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DE1 User Manual
Signal Name
HEX0[0]
HEX0[1]
HEX0[2]
HEX0[3]
HEX0[4]
HEX0[5]
HEX0[6]
HEX1[0]
HEX1[1]
HEX1[2]
HEX1[3]
HEX1[4]
HEX1[5]
HEX1[6]
HEX2[0]
HEX2[1]
HEX2[2]
HEX2[3]
HEX2[4]
HEX2[5]
HEX2[6]
HEX3[0]
HEX3[1]
HEX3[2]
HEX3[3]
HEX3[4]
HEX3[5]
HEX3[6]
FPGA Pin No.
PIN_J2
PIN_J1
PIN_H2
PIN_H1
PIN_F2
PIN_F1
PIN_E2
PIN_E1
PIN_H6
PIN_H5
PIN_H4
PIN_G3
PIN_D2
PIN_D1
PIN_G5
PIN_G6
PIN_C2
PIN_C1
PIN_E3
PIN_E4
PIN_D3
PIN_F4
PIN_D5
PIN_D6
PIN_J4
PIN_L8
PIN_F3
PIN_D4
Description
Seven Segment Digit 0[0]
Seven Segment Digit 0[1]
Seven Segment Digit 0[2]
Seven Segment Digit 0[3]
Seven Segment Digit 0[4]
Seven Segment Digit 0[5]
Seven Segment Digit 0[6]
Seven Segment Digit 1[0]
Seven Segment Digit 1[1]
Seven Segment Digit 1[2]
Seven Segment Digit 1[3]
Seven Segment Digit 1[4]
Seven Segment Digit 1[5]
Seven Segment Digit 1[6]
Seven Segment Digit 2[0]
Seven Segment Digit 2[1]
Seven Segment Digit 2[2]
Seven Segment Digit 2[3]
Seven Segment Digit 2[4]
Seven Segment Digit 2[5]
Seven Segment Digit 2[6]
Seven Segment Digit 3[0]
Seven Segment Digit 3[1]
Seven Segment Digit 3[2]
Seven Segment Digit 3[3]
Seven Segment Digit 3[4]
Seven Segment Digit 3[5]
Seven Segment Digit 3[6]
Table 4.4. Pin assignments for the 7-segment displays.
4.4 Clock Inputs
The DE1 board includes three oscillators that produce 27 MHz, 24Mhz, and 50 MHz clock signals .
The board also includes an SMA connector which can be used to connect an external clock source
to the board. The schematic of the clock circuitry is shown in Figure 4.8, and the associated pin
assignments appear in Table 4.5.
31
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